Logic function F as sum of minimarts are given.
Question
Logic Function F (x, y, z, w) = ∑ m (0,2,4,6,10,13) + ∑ k (8,12) as sum of minimarts are given. (Note: There are terms that are not taken into account.)
a. Obtain the Truth Table.
b. Simplify with the K Map approach.
c. Draw the simplified Logic circuit with two input AND-NOT (NAND) gates. With how many apples you realized, what is your gain? Comment.
Explanation
We have given a logic function
We have already given the equation. And equation is : F (x, y, z, w) = ∑ m (0,2,4,6,10,13) + ∑ k (8,12)
| X | Y | Z | W | F |
| 0 | 0 | 0 | 0 | 1 |
| 0 | 0 | 0 | 1 | 0 |
| 0 | 0 | 1 | 0 | 1 |
| 0 | 0 | 1 | 1 | 0 |
| 0 | 1 | 0 | 0 | 1 |
| 0 | 1 | 0 | 1 | 0 |
| 0 | 1 | 1 | 0 | 1 |
| 0 | 1 | 1 | 1 | 0 |
| 1 | 0 | 0 | 0 | D |
| 1 | 0 | 0 | 1 | 0 |
| 1 | 0 | 1 | 0 | 1 |
| 1 | 0 | 1 | 1 | 0 |
| 1 | 1 | 0 | 0 | D |
| 1 | 1 | 0 | 1 | 1 |
| 1 | 1 | 1 | 0 | 0 |
| 1 | 1 | 1 | 1 | 0 |
⦁ K-map result is:
F= Y’W’ + X’W’ + XYZ’
For the circuit diagram, we have to use 10 NAND gates. Also we have the logic diagram of f. Also we will need the the hardware for the circuit. For such diagram we have 2 or 3 NAND gates IC. And this will help in to save money and the hardware cost.
Also read, You are to implement an efficient positional collection of elements to share a resource.
